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As semiconductor scaling has continued, increasingly rigorous requirements for precision and uniformity in chip fabrication have propelled the first comprehensive redesign of the silicon etch chamber in over a decade. The resulting Applied Centris Sym3 system delivers world-class cross-wafer uniformity with unprecedented within-chip feature control in critical etch applications for high-volume manufacturing at the 1x/10nm node and beyond.
The redesigned Sym3 chamber environment makes possible process control to within a few atomic layers within chip, chip to chip, and wafer to wafer. The Centris platform delivers the excellent repeatability and high productivity demanded for high-volume manufacturing through system intelligence software that ensures exact process matching among the six etch chambers and between the two plasma clean chambers mounted on the platform.
At earlier technology nodes, when features were larger, a greater range in variation in etch depth, line or space width, or profile angle could be accommodated without affecting device performance. Similarly, occasional particles remaining on feature surfaces did not jeopardize device reliability. At the 1x/10nm node, however, the slightest differences in etch depth, line or space width, or profile angle can be fatal flaws in chip manufacture. And defect-free surfaces are equally essential.
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